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14.1 Mutual Inductance 14.2 Coupling Coef cient 14.3 Analysis of Coupled Coils 14.4 Dot Rule 14.5 Energy in a Pair of Coupled Coils 14.6 Conductively Coupled Equivalent Circuits 14.7 Linear Transformer 14.8 Ideal Transformer 14.9 Autotransformer 14.10 Re ected Impedance

C(6, 7)

The transfer bias line for this case is also drawn on Fig. 5-16; it has abscissa intercept vGS VGG 3 V and slope 1=RS . Here IDQ max % 1:9 mA and IDQ min % 1:3 mA. (c) We changed VGG by altering the R1 -R2 voltage divider. This allowed us to maintain a small negative slope on the transfer bias line (and, thus, a small di erence IDQ max IDQ min while shifting the range of IDQ .

334 335 336 338 338 339 340 342 343 344

Fig. 12-10

15.1 15.2 15.3 15.4 15.5 15.6 15.7 Spice and PSpice Circuit Description Dissecting a Spice Source File Data Statements and DC Analysis Control and Output Statements in DC Analysis Thevenin Equivalent Op Amp Circuits

The MOSFET of Fig. 4-18 is an enhancement-mode device with worst-case shorted-gate parameters as follows:

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12.11 Applying the distance formula to a circle A circle is tangent to the x-axis and has its center at (6, 4). Where is the point (9, 7) with respect to the circle

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Since the circle is tangent to the x-axis, AQ in Fig. 12-11 is a radius. By Principle 2, AQ By Principle 3, BQ 2(9 6)2 (7 4)2 greater than a radius so B is outside the circle. 232 32 4. 218. Since 218 is greater than 4, BQ is

CHAP. 5]

15.8 AC Steady State and Frequency Response 15.9 Mutual Inductance and Transformers 15.10 Modeling Devices with Varying Parameters 15.11 Time Response and Transient Analysis 15.12 Specifying Other Types of Sources 15.13 Summary

y B(9, 7)

These parameter values lead to the transfer characteristics of Fig. 5-17 because the device may be assumed to obey (4.6). Let VDD 24 V; R1 2 M ; R2 2 M ; RD 1 k ; and RS 2 k . (a) Find the range of IDQ that can be expected. (b) Find the range of VDSQ to be expected. (c) Discuss a technique, suggested by parts a and b, for minimizing the range of IDQ for this model of MOSFET.

373 375 375 378 379 382

Q(6, 4)

16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 Introduction The Laplace Transform Selected Laplace Transforms Convergence of the Integral Initial-Value and Final-Value Theorems Partial-Fractions Expansions Circuits in the s-Domain The Network Function and Laplace Transforms

0 0 2 4 6 8 10 12

x O y A(6, 0)

398 398 399 401 401 402 404 405

The transfer bias line, with abscissa intercept vGS VGG 12 V and slope 1=RS , is drawn on Fig. 5-17. From the intersections of the transfer bias line with the transfer characteristics, we see that IDQ max % 4 mA and IDQ min % 2:8 mA. b VDSQ max VDD IDQ max RS RD 24 4 2 1 12 V VDSQ min VDD IDQ min RS RD 24 2:8 2 1 15:6 V (c) As in the case of the JFET, the range of IDQ can be decreased by increasing RS . However, to avoid undesirably small values for IDQ , it is also necessary to increase VGG by altering the R1 -R2 voltagedivider ratio.

Fig. 12-11

17.1 Introduction 17.2 Trigonometric Fourier Series 17.3 Exponential Fourier Series 17.4 Waveform Symmetry 17.5 Line Spectrum 17.6 Waveform Synthesis 17.7 Effective Values and Power 17.8 Applications in Circuit Analysis 17.9 Fourier Transform of Nonperiodic Waveforms 17.10 Properties of the Fourier Transform 17.11 Continuous Spectrum

PRINCIPLE 1:

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